TSMC's 'New 1.6nm Chip' Is Old Silicon With a Better Wire. That's the Whole Move.

In April 2024, on a stage in front of its biggest customers, TSMC unveiled a chip with a name that sounded like the future: A16.¹ The 'A' is for angstroms. Ten of them make a nanometer, so A16 reads as 1.6 nanometers - a number smaller than anything anyone has shipped, a leap past the 2nm everyone else is racing toward. Except TSMC, when pressed, won't call it 1.6nm at all.⁶ And the transistor architecture inside it isn't new. It is the same first-generation nanosheet GAA architecture TSMC already built for its N2 node — with incremental improvements, but no new transistor generation. What changed most dramatically is where the power wires run. That's the leap.

The story the name tells is that TSMC sprinted to a new frontier of transistor physics. The truth is quieter and far more interesting. A16 is built on the same first-generation nanosheet GAA platform as N2P, with backside power delivery added — and TSMC's own senior leadership is candid about the lineage.

The feature that got demoted, then promoted

Here is the move almost everyone missed. Backside power delivery - routing the power wires underneath the transistors instead of crowding them on top - was never supposed to be its own node. It was originally planned for N2P, the second-generation 2nm process, targeted for the back half of 2025. Then it was pulled. TSMC removed it from N2P and gave it a new name: A16.⁴ The reason is the part the marketing skips. TSMC's version of backside power, called Super Power Rail, connects directly to each transistor's source and drain - one of the most complex backside designs in the industry, more involved than Intel's. That complexity is expensive, and expensive features don't belong on a high-volume mainstream node feeding millions of phones.⁷ So TSMC didn't cancel it. It quarantined it - peeled it off the cheap, ubiquitous node and stood it up as a premium one. A demoted feature became a promoted product.

Strip away the angstrom branding and the thesis is plain. TSMC isn't selling a new transistor generation. It is selling segmentation. By building A16 as a separate, higher-priced lane aimed squarely at high-performance computing and AI chips - the buyers whose power-hungry designs actually benefit from source-and-drain backside power - TSMC gets to charge a premium for an expensive feature without forcing it, or its cost, onto the mobile customers who don't need it.² The mobile roadmap stays on N2P, cheaper and undisrupted. The AI customers pay up for A16. Same fab, same transistor family, two price points. It's a price-discrimination play wearing a technology-leap costume.

The rival who handed TSMC the playbook

The richest twist is who made this possible. TSMC did not invent backside power. Intel demonstrated and shipped it first, on its 18A process, with a version called PowerVia — Panther Lake, the first 18A product, shipped in late 2025, well ahead of A16's volume ramp.⁹ But Intel built the simpler kind, connecting at the cell contact level, and reached market first with that implementation.⁷⁷ That left TSMC a lane. Rather than match Intel's timing on a cheap node, TSMC went the other direction: a harder, costlier source-and-drain implementation, deliberately reserved for the customers who'd pay for it. Intel proved the technology worked and normalized it as table stakes. TSMC then declined to compete on Intel's terms and instead carved a premium tier above them. The follower turned the leader's head start into a market it could segment.

Isn't this just clever foundry marketing, then?

The fair objection is that calling A16 a 'mere' repricing undersells it. The gains are real - up to 10% faster or 20% lower power, with denser logic - and TSMC's source-and-drain backside contact is genuinely harder engineering than its rivals' versions, not a cosmetic tweak.¹⁷ All true. But difficulty isn't the same as a new node, and the strategy holds precisely because the engineering is real: a premium lane only commands a premium if the thing inside it actually delivers. The honest counter cuts the other way, too. This was not a frictionless masterstroke. A16 was first pitched for 2026 production, and TSMC has since pushed real volume to 2027, with its SVP conceding the ramp depends on customers showing up with products.³ And the no-High-NA-EUV restraint that keeps A16 affordable is explicitly temporary - TSMC's own annual report says it is exploring next-generation lithography for the nodes that follow.⁸ So the segmentation is deliberate and well-executed, but it is also a holding pattern. The genuine geometric shrink everyone thinks they're buying today is still a node or two away. A16 is the bridge built to charge a toll while the real bridge gets engineered.

TSMC didn't crack the angstrom era with a new transistor. It cracked it with a rename. It took a feature it couldn't afford to put everywhere, gave it a number that sounds like the frontier, and sold it to the only customers who'd pay frontier prices - while its mainstream business kept humming along on cheaper silicon, untouched. That's not a smaller win than inventing a new node. It's a different game entirely: the one where you don't have to out-engineer the future to get paid for it - you only have to out-segment the present.